1. Field of the Invention
The present invention relates to a method for performing multi-programmable function with one-time programmable (OTP) memory, and more particularly, to a method of recording data conversion between words for reducing addressing operations and increasing record counts.
2. Description of the Prior Art
Memory is a type of storage device manufactured utilizing a semiconductor technology. Memory can be classified into two types: volatile memory and non-volatile memory. Data stored in volatile memory is immediately erased once power supply is cut off. DRAM and SRAM are the most common types of volatile memories. Unlike volatile DRAM and SRAM memories, data stored in non-volatile memory can hold its content without the need of a power supply. In other words, the stored data in non-volatile memories can be retrieved after the power supply is re-connected. Read only memory (ROM), programmable ROM (PROM), erasable PROM (EPROM), one time PROM (OTP), electrically EPROM (EEPROM), and flash memory are the common types of non-volatile memories.
The operational theories of the above-mentioned memories are well known to those skilled in the art and therefore will not be reiterated. A flash memory can operate at a highly efficient speed but it can still work after one hundred thousand erase/programming operations, but each memory unit of the flash memory includes a complex structure of a controlled gate and a floating gate which results in the high cost of the flash memory and a complicated hardware circuit. In comparison, the OTP memory can only be written once, and the theory of data storage utilizes high voltage to write-in data, and the data cannot be erased once the data is written in, therefore the covered housing of the OTP memory has no transparent window installed. Hence the cost of the OTP memory is lower and the hardware circuit is less complicated.
OTP memory includes characteristics like lower cost and a less complicated circuit, therefore the prior art provides an apparatus that can realize an OTP memory to perform multi-programmable function. Generally, this type of OTP memory is widely adopted in all kinds of electronic products such as digital cameras, mobile phones, game consoles, and personal digital assistants (PDA) for storing data that is not updated such as firmware. Please refer to FIG. 1. FIG. 1 illustrates a functional block diagram of a conventional memory 100. The memory 100 is capable of performing multi-programmable function with one-time programmable (OTP) memory and includes a OTP memory array 102, an initial address indicator 104, an array decoder 106, a line decoder 108, and a control circuit 110. In the memory apparatus 100, the OTP memory array 102 includes N number of OTP memory blocks 112, each OTP memory block 112 includes M number of OTP memory units. In other words, the OTP memory array 102 includes N rows and M lines. Each OTP memory unit is utilized for recording a bit data, hence each OTP memory block 112 is capable of recording a word data of M bits. The initial address indicator 104 includes N number of memory units 114, each memory unit 114 corresponds to a OTP memory block 112 for recording whether the corresponding OTP memory block 112 is being utilized. Therefore, when the memory 100 reads a last word being recorded in the OTP array 102, the control circuit 110, according to data of the memory unit 114 of the initial address indicator 104, determines an address for storing the last word being recorded in the OTP memory block 112, and the array decoder 106 and the line decoder 108 decode the data required. When write in data, the control circuit 110 writes in data through the array decoder 106 and the line decoder 108 to an unutilized OTP memory block 112, and after data is written in, the memory unit 114 corresponding to the OTP memory block is set to utilized.
Therefore utilization is limited because the memory 100 is required to have an extra OTP memory unit utilized as the initial address indicator 104 to indicate the address of the utilized OTP memory block 112. Additionally, the memory count of the memory 100 is limited only by the count of the OTP memory block 112.